Type of course

Admission requirements

A relevant undergraduate Bachelor degree in Engineering program in power electronics and electrical machines. Basic knowledge in power systems is also an advantage.

In addition, the following requirements must be met:

- minimum 25 credits in mathematics (equivalent to Mathematical Methods 1, 2 og 3), 5 credits in statistics and 7,5 ects i physics on a higher level is required.

Application code: 9371

Course content

This course introduces the students to digital circuit design using VHDL. Emphasis will be put on understanding the difference between normal programming of instructions running in a CPU and digital circuit synthesis in an FPGA. The students will get experience in designing digital circuits in an FPGA in many areas:

• Combinatorial circuits, e.g. comparators, (de)multiplexers, encoders, and adders/subtractors.
• Ordinary sequential circuits using Register Transfer Logic (RTL), e.g. data flip-flops, shift-registers, and counters.
• Application specific sequential circuits coded as Finite State Machines with Datapath (FSMD), using patterns in VHDL programming to ensure that timing requirements in the FPGA are met.
• Applications can be traffic lights, line coding in tele communication, UART, SPI, I2C, CPU, etc.
• Different types of simulation of VHDL code to verify the functionality of the implementation.
• How to use the User Constraint File (UCF), be able to synthesise, implement, and program a design to an FPGA.
• Use of IP-cores for rapid implementation of advanced circuitry.

Use of advanced debugging tools, including IP-cores for Virtual I/O (VIO) og Integrated Logic Analyser (ILA).

Recommended prerequisites

Objectives of the course

After completing the subject, the candidate will have the following learning outcome:

Knowledge:

The candidate knows:

• The principles for the design av development of FPGA based systems.
• Describe how to represent numbers and letters in VHDL.
• Understand the difference between combinatorial and sequential logic.
• Understand the difference between signals and variables in VHDL.
• Understand how to use coding patterns to separate the combinatorial and the sequential part of a state machine to ensure adherence to the timing constraints of an FPGA.
• Principles for testing and trouble shooting on digital circuits.

Skills:

The candidate can

• Use tools and software for digital design.
• Write VHDL code from a requirements specification.
• Write VHDL code for combinatorial circuits.
• Write VHDL code for sequential circuits.
• Use coding patterns to build a state machine in VHDL that meets the timing constraints in an FPGA.

Use Vitrual I/O (VIO) and Integrated Logic Analyser (ILA) to test, troubleshoot and verify the functionality of a digital circuit.

Language of instruction and examination

Teaching methods

Information to incoming exchange students

This course is open for inbound exchange student who meets the admission requirements. Please see the Admission requirements" section".

Master Level

Do you have questions about this module? Please check the following website to contact the course coordinator for exchange students at the faculty: https://en.uit.no/education/art?p_document_id=510412.